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Espressif Systems /ESP32-C6 /EXTMEM /L1_CACHE_SYNC_PRELOAD_INT_ENA

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Interpret as L1_CACHE_SYNC_PRELOAD_INT_ENA

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (L1_ICACHE0_PLD_DONE_INT_ENA)L1_ICACHE0_PLD_DONE_INT_ENA 0 (L1_ICACHE1_PLD_DONE_INT_ENA)L1_ICACHE1_PLD_DONE_INT_ENA 0 (L1_ICACHE2_PLD_DONE_INT_ENA)L1_ICACHE2_PLD_DONE_INT_ENA 0 (L1_ICACHE3_PLD_DONE_INT_ENA)L1_ICACHE3_PLD_DONE_INT_ENA 0 (L1_CACHE_PLD_DONE_INT_ENA)L1_CACHE_PLD_DONE_INT_ENA 0 (CACHE_SYNC_DONE_INT_ENA)CACHE_SYNC_DONE_INT_ENA 0 (L1_ICACHE0_PLD_ERR_INT_ENA)L1_ICACHE0_PLD_ERR_INT_ENA 0 (L1_ICACHE1_PLD_ERR_INT_ENA)L1_ICACHE1_PLD_ERR_INT_ENA 0 (L1_ICACHE2_PLD_ERR_INT_ENA)L1_ICACHE2_PLD_ERR_INT_ENA 0 (L1_ICACHE3_PLD_ERR_INT_ENA)L1_ICACHE3_PLD_ERR_INT_ENA 0 (L1_CACHE_PLD_ERR_INT_ENA)L1_CACHE_PLD_ERR_INT_ENA 0 (CACHE_SYNC_ERR_INT_ENA)CACHE_SYNC_ERR_INT_ENA

Description

L1-Cache Access Fail Interrupt enable register

Fields

L1_ICACHE0_PLD_DONE_INT_ENA

The bit is used to enable interrupt of L1-ICache0 preload-operation. If preload operation is done, interrupt occurs.
L1_ICACHE1_PLD_DONE_INT_ENA

The bit is used to enable interrupt of L1-ICache1 preload-operation. If preload operation is done, interrupt occurs.
L1_ICACHE2_PLD_DONE_INT_ENA

Reserved
L1_ICACHE3_PLD_DONE_INT_ENA

Reserved
L1_CACHE_PLD_DONE_INT_ENA

The bit is used to enable interrupt of L1-Cache preload-operation. If preload operation is done, interrupt occurs.
CACHE_SYNC_DONE_INT_ENA

The bit is used to enable interrupt of Cache sync-operation done.
L1_ICACHE0_PLD_ERR_INT_ENA

The bit is used to enable interrupt of L1-ICache0 preload-operation error.
L1_ICACHE1_PLD_ERR_INT_ENA

The bit is used to enable interrupt of L1-ICache1 preload-operation error.
L1_ICACHE2_PLD_ERR_INT_ENA

Reserved
L1_ICACHE3_PLD_ERR_INT_ENA

Reserved
L1_CACHE_PLD_ERR_INT_ENA

The bit is used to enable interrupt of L1-Cache preload-operation error.
CACHE_SYNC_ERR_INT_ENA

The bit is used to enable interrupt of Cache sync-operation error.

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data